Non-volatile memories that are capable of rewriting data have attained wide use. In a typical type of non-volatile memory, flash memory, a transistor that configures a memory cell stores data by storing electric charge in a charge storage layer. Floating gate flash memories, that use a floating gate, and silicon oxide nitride oxide silicon (SONOS) flash memories, in which electric charges are stored in a trap layer made of silicon nitride film, use such charge storage layers. One example of the SONOS flash memories, is a flash memory that has a virtual ground memory cell that switches a source and a drain to symmetrically operate.
FIG. 1A is a top view showing an element structure of a flash memory according to a related art example, FIG. 1B is a cross-sectional view between A-A of FIG. 1A, and FIG. 1C is a cross-sectional view between B-B of FIG. 1A. FIG. 1A is shown through an ONO film 18. With reference to FIG. 1A to FIG. 1C, on a semiconductor substrate 10 that is a P-type silicon substrate (or a semiconductor substrate having a p-type region), a tunnel oxide film 12 made of a silicon oxide film, a charge storage layer 14 made of a silicon nitride film that is an insulating film, and a top oxide film 16 made of a silicon oxide film are provided. In the aforementioned process, the ONO film 18 is formed on the semiconductor substrate 10. On the ONO film 18, a plurality of word lines 20 made of polysilicon films, and that also serve as gates are provided so as to extend. In the semiconductor substrate 10, a plurality of bit lines 22 that are N-type diffusion regions, and that also serve as sources and drains are formed so as to extend across the word lines 20.
With reference to FIG. 1A and FIG. 1B, writing of data to a memory cell is described. For example, by rendering a bit line 22 (BL1) as a source and a bit line 22 (BL2) as a drain, a high voltage is applied between the bit lines BL1 and BL2. A positive voltage is applied to a word line 20 (WL2). Due to hot electron effects, electrons are injected into the charge storage layer 14, and the electrons (electric charges) can be stored in a charge storage region C1. Further, by switching the source and the drain, electrons (electric charges) can be stored in a charge storage region C2.
When reading data from a memory cell, the threshold voltage of a transistor configuring the memory cell becomes high due to electric charges stored in a charge storage region. By measuring such threshold voltage by current levels, data written in the memory cell can be read.
Japanese Patent Application Publication No. 9-102199 discloses a technology that, when reading data from a memory cell array having a plurality of memory cells, applies a negative voltage to all word lines of non-selected memory cells coupled to selected memory cells via a bit line to read data only from the selected memory cells. Japanese Patent Application Publication No. 11-330277 discloses a technology that, when reading data of a MONOS flash memory, applies a positive voltage to a word line of a memory cell in which data is not read to reduce read-disturbance.